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d a t a sh eet preliminary speci?cation supersedes data of september 1993 file under integrated circuits, ic02 1995 may 23 integrated circuits TDA9847 tv and vtr stereo/dual sound processor with digital identification
1995 may 23 2 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 features supply voltage 5 to 8 v source selector stereo matrix af inputs for external stereo af signals (scart or nicam) af outputs for main and scart led operation mode indication (stereo and dual) high identification reliability. general description the TDA9847 is a stereo/dual sound processor for tv and vtr sets. its identification ensures safe operation by using internal digital pll technique with extremely small bandwidth, synchronous detection and digital integration (switching time maximum 2.0 s; identification concerning the main functions). quick reference data ordering information symbol parameter conditions min. typ. max. unit v p supply voltage (pin 22) 4.5 5 8.8 v i p supply current (pin 22) without led current 14 15 20 ma v i(rms) nominal input signal voltage v i1 to v i4 (rms value) 54% modulation b/g - 250 - mv l - 500 - mv v o(rms) nominal output signal voltage (rms value) 54% modulation - 500 - mv v o(rms) clipping level of the output signal voltages (rms value) thd 1.5%; b/g or l v p = 5 v 1.4 1.60 - v v p = 8 v 2.4 2.65 - v i lon input current led on -- 12 ma v i pil input voltage sensitivity of pilot frequency unmodulated 5 - 100 mv s/n(w) weighted signal-to-noise ratio ccir468-3 66 75 - db thd total harmonic distortion - 0.2 0.3 % t amb operating ambient temperature 0 - +70 c f ident identi?cation window width stereo 2.2 - 2.2 hz dual 2.3 - 2.3 hz t ident on total identi?cation time on 0.35 - 2.0 s v i tuner identi?cation voltage sensitivity - 28 - db m v d f pil pull-in frequency range of pilot pll f osc = 10.008 mhz lower side - 296 -- 296 hz upper side 302 - 302 hz type number package name description version TDA9847 sdip24 plastic shrink dual in-line package; 24 leads (400 mil) sot234-1 TDA9847t so24 plastic small outline package; 24 leads; body width 7.5 mm sot137-1
1995 may 23 3 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 block diagrams fig.1 block diagram of the bipolar tv/vtr-stereo decoder. input and output levels are nominal values related to the scart norm (am: m = 0.54, fm: d f= 27 khz). 6 db 0 db 3 db 3 db 3 db 6 db (am) 6 db 6 db 6 db rms 250 mv 250 mv v ref v ref v ref v ref v ref v ref rms r/b 250 mv rms l/a/mono am 50 k w 50 k w 15 k w 2.2 k w 35 k w 2.2 k w 50 k w 10 k w 10 k w 5 k w 5 k w 30 k w 25 k w 25 k w 1 k w a/mono 500 mv rms 500 mv rms 500 mv rms 500 mv rms control logic power-on reset supply digital integrator digital integrator digital pll and demodulator digital pll and demodulator digital pll oscillator 2.2 m f 10 m f 2.2 m f 2.2 m f 100 m f/ 16 v 2.2 m f l + r 2 , a 250 mv rms (am: 500 mv rms) v i2 v i1 r fp r, b 250 mv rms 47 pf c fp 3.3 nf 10 nf tan d 0.002 c dcl q o = 70 c agc c lp v ref v p v p c ref 10 mhz (117 hz) (274 hz) stereo bit dual bit stereo transmission dual transmission v o4 v i4 v i3 v o3 v o2 v o1 c d1 c d2 main 0 db l 10 nf 5% 10 nf 5% 250 mv rms 250 mv rms scart 100 nf 17 21 12 11 14 13 16 15 19 18 1 2 24 20 22 23 8 3 c1 c2 c3 c4 5 4 6 7 10 9 TDA9847 mute med803 1/2 v p scart 2.5 mh
1995 may 23 4 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 fig.2 block diagram of the bipolar tv/vtr-stereo decoder with fixed coil (alignment-free). input and output levels are nominal values related to the scart norm (am: m = 0.54, fm: d f= 27 khz). the components of the external lc band-pass filter have the following order-no.: philips germany only no: 4312 020 17525 or fastron sdn. bha., malaysia type smcc 472 j for l = 4.7 mhz ( 5%) philips components no: 2222 429 71802, c = 1.8 nf ( 2%). 6 db 0 db 3 db 3 db 3 db 6 db (am) 6 db 6 db 6 db rms 250 mv 250 mv rms r/b 250 mv rms l/a/mono am 50 k w 50 k w 15 k w 2.2 k w 35 k w 2.2 k w 50 k w 10 k w 10 k w 5 k w 5 k w 27 k w 25 k w 25 k w 1 k w a/mono 500 mv rms 500 mv rms 500 mv rms 500 mv rms control logic power-on reset supply digital integrator digital integrator digital pll and demodulator digital pll and demodulator digital pll oscillator 2.2 m f 10 m f 2.2 m f 2.2 m f 100 m f/ 16 v 2.2 m f l + r 2 , a 250 mv rms (am: 500 mv rms) v i2 v i1 r fp r, b 250 mv rms 180 pf 4.7 mh c fp 1.8 nf 10 nf 2% 5% tan d 0.01 c dcl q o = 25 c agc c lp v p v p c ref 10 mhz (117 hz) (274 hz) stereo bit dual bit stereo transmission dual transmission v o4 v i4 v i3 v o3 v o2 v o1 c d1 c d2 main 0 db l 10 nf 5% 10 nf 5% 250 mv rms 250 mv rms scart 100 nf 17 21 12 11 14 13 16 15 19 18 1 2 24 20 22 23 8 3 c1 c2 c3 c4 5 4 6 7 10 9 TDA9847 mute med804 1/2 v p scart v ref v ref v ref v ref v ref v ref v ref
1995 may 23 5 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 pinning symbol pin description c1 1 control input port c1 c2 2 control input port c2 c4 3 control input port c4 c agc 4 agc capacitor of pilot frequency ampli?er c lp 5 identi?cation low-pass capacitor c dcl 6 dc loop capacitor v i pil 7 pilot frequency input voltage c ref 8 capacitor of reference voltage ( 1 2 v p ) v i1 9 af input signal voltage 1 [from sound carrier 1 or am sound (standard l)] v i2 10 af input signal voltage 2 (from sound carrier 2) v i3 11 af input signal voltage 3 (scart) v i4 12 af input signal voltage 4 (scart) v o2 13 af output signal voltage 2 (main) v o1 14 af output signal voltage 1 (main) v o4 15 af output signal voltage 4 (scart) v o3 16 af output signal voltage 3 (scart) c d1 17 50 m s de-emphasis capacitor of af channel 1 leddu 18 led (dual) ledst 19 led (stereo) gnd 20 ground (0 v) c d2 21 50 m s de-emphasis capacitor of af channel 2 v p 22 supply voltage (5 to 8 v) xtal 23 10 mhz crystal input c3 24 control input port c3 fig.3 pin configuration. TDA9847 med805 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 c3 xtal v p c d2 gnd ledst leddu c d1 v o3 v o4 v o1 v o2 c1 c2 c4 c agc c lp c dcl v i pil c ref v i1 v i2 v i3 v i4
1995 may 23 6 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 functional description af signal handling the input af signals, derived from the two sound carriers, are processed in analog form using operational amplifiers. de-matrixing uses the technique of two amplifiers processing the af signals. finally, a source selector provides the facility to route the mono signal through to the outputs (forced mono). de-emphasis is performed by two rc low-pass filter networks with internal resistors and external capacitors. this provides a frequency response with the tolerances given in fig.4. a source selector, controlled via the control input ports allows selection of the different modes of operation in accordance with the transmitted signal. the device was designed for a nominal input signal (fm: 54% modulation is equivalent to d f= 27 khz) of 250 mv rms value (v i1 and v i2 ) and for a nominal input signal (am: m = 0.54) of 500 mv rms value (v i1 ), respectively 250 mv rms (v i3 and v i4 ). a nominal gain of 6 db for v i1 and v i2 signals (0 db for v i1 signal (am sound)) and 6 db for v i3 and v i4 signals is built-in. by using rail-to-rail operational amplifiers, the clipping level (thd 1.5%) is 1.60 v rms for v p = 5 v and 2.65 v rms for v p = 8 v at outputs v o1 to v o3 and v o4 . care has been taken to minimize switching plops. also total harmonic distortion and random noise are considerably reduced. identi?cation the pilot signal is fed via an external rc high-pass filter and single tuned lc band-pass filter to the input of a gain controlled amplifier. the external lc band-pass filter in combination with the external rc high-pass filter should have a loaded q-factor of approximately 40 to 50 to ensure the highest identification sensitivity. by using a fixed coil ( 5%) to save the alignment (see fig.2), a q-factor of approximately 12 is proposed. this may cause a loss in sensitivity of approximately 2 to 3 db. a digital pll circuit generates a reference carrier, which is synchronized with the pilot carrier. this reference carrier and the gain controlled pilot signal are fed to the am-synchronous demodulator. the demodulator detects the identification signal, which is fed through a low-pass filter with external capacitor clp (pin 5) to a schmitt trigger for pulse shaping and suppression of low level spurious signal components. this is a measure against mis-identification. the identification signal is amplified and fed through an agc low-pass filter with external capacitor cagc (pin 4) to obtain the agc voltage for controlling the gain of the pilot signal amplifier. the identification stages consist of two digital pll circuits with digital synchronous demodulation and digital integrators to generate the stereo or dual sound identification bits which can be indicated via leds. a 10 mhz crystal oscillator provides the reference clock frequency. the corresponding detection bandwidth is larger than 50 hz for the pilot carrier signal, so that f p -variations from the transmitter can be tracked in the event of missing synchronization with the horizontal frequency f h . however the detection bandwidth for the identification signal is made small ( 1 hz) to reduce mis-identification. figure 2 shows an example of the alignment-free f p band-pass filter. to achieve the required q l of around 12, the q 0 at f p of the coil was chosen to be around 25 (effective q 0 including pcb influence). using coils with other q 0 , the rc-network (r fp and c fp ) has to be adapted accordingly. it is assumed that the loss factor tan d of the resonance capacitor is 0.01 at f p . copper areas under the coil might influence the loaded q and have to be taken into account. care has also to be taken in environments with strong magnetic fields when using coils without magnetic shielding. control input ports the complete ic is controlled by the four control input ports c1, c2, c3 and c4. which af output channel pair can be selected is determined by the control input port c4 [low: main; high: scart; 3-state: preset position (see section general information)]. with the other control input ports c1, c2 and c3 the user can select between different af sources in accordance with the transmitter status (see tables 1 and 2). finally, schmitt triggers are added in the input port interfaces to suppress spikes on the control lines c1, c2, c3 and c4. after a power-on reset (por) both registers are reset (mute mode for both af channel pairs). after some time ( 1 ms), when the por is automatically deactivated, the switch positions of the main channel (c4 = low) are changed in accordance with the other control input port levels. if c4 is high after a por, the switch positions of the scart channel cannot change. the reason is, that the main register is reset (mute mode; see table 1). thus, at first the main register byte has to be changed out of the mute function, e.g. sound mute.
1995 may 23 7 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 after that, when c4 is high (see table 2), the switch positions of the scart channel are changed in accordance with the other control line levels. when the supply voltage of the TDA9847 is not connected (standby function), the control lines remain undisturbed. the logic level combination 1000 of the control input ports (c4, c3, c2 and c1) is not allowed (see tables 1 and 2). operating mode selection tables 1 and 2 show the different operating modes of this stereo decoder. m ute mode this ic has two different mute modes: 1. mute mode. 2. sound mute mode. in the mute mode, when all control input lines are set low, all af channels are muted (fast mute). finally, the integrators are reset provided the user does not leave this mode (identification is disabled). when the user changes this mode, the identification circuit starts with the detection. in the sound mute mode each af channel can be separately muted (0100 = main and 1100 = scart). the identification circuit is activated and the leds are on or off in accordance with the detection status of this circuit. m ono mode for the transmitter status mono the user must set the TDA9847 in the mono mode with x001 or x010 (see tables 1 and 2). the level combination x011 is reserved for the am sound (standard l), because in this mode the de-emphasis is deactivated and the gain of the af signal from input to output is reduced from 6 db to 0 db. at the af outputs the signal has the same level for standards with fm or am modulated sound assuming the same modulation degree. s tereo mode in this mode the choice between stereo and mono (forced mono) signals is common for both af channel pairs. the mode for main and scart is achieved by control of the main channel (see tables 1 and 2). d ual mode in this mode there is no restriction to select af inputs and outputs independently in both channels. e xternal mode external sound sources, e.g. from scart input, are fed to both af channel pair outputs. when the user chooses the external mode of the main channel (see table 1), the identification circuit is still running, but the leds are switched-off. programming of the main and scart register g eneral information the switch positions of both af channels are directly controlled by the data of the main and scart register. these registers are programmable by a microcontroller. in the 3-state mode the logic content of the c1, c2 and c3 control lines remains stored in the registers for main and scart, so the switch positions in the source selector do not change. the logic content of these control lines can be changed without changing the switch positions of the source selector (preset position) to prepare the new operating mode selection for the main or scart channel. the execution of this new mode is achieved by leaving the preset position (3-state): when the c4 level goes low, the logic content of the control lines c1, c2 and c3 are valid for the main channel (see table 1) and in the event of high the c1, c2 and c3 are valid for the scart channel (see table 2). the identification bits and the control lines influence the operating mode selection for the af switches in the source selector and de-matrix, e.g. both af channels are programmed in the mono mode (x001, see tables 1 and 2). the leds are switched-off. when the identification circuit detects the stereo identification frequency (f s = 117 hz) the de-matrix is immediately switched in the stereo mode without changing the control line levels. the stereo signals are routed to all af outputs. in the event of dual frequency detection (f d = 274 hz) both dual sounds are fed to the af output pairs. m icrocontroller with 3- state output ports figure 10 shows an example of an application circuit for TDA9847 (v p = 4.5 to 8.8 v) in conjunction with a microcontroller, which has a low/high-ohmic/high output port to control the main and scart channel (c4 control line). for the c1, c2 and c3 line the microcontroller requires only low/high output ports. two resistors r c4a and r c4b are necessary for the c4 line to generate the 3-state voltage. the values and tolerances of these components are given in fig.10.
1995 may 23 8 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 when the microcontroller has only open drain ports available for the c1, c2 and c3 control line, external pull-up resistors must be connected to these control lines. figure 7 shows an example of a timing diagram to program the main and scart register of the TDA9847 with a microcontroller via the control lines c1, c2, c3 and c4. both registers are programmed with the same control line levels: c1 = low, c2 = high and c3 = low. the dual identification frequency is detected and the dual led is switched-on. the a-signal (dual mode) is fed to all af outputs (see tables 1 and 2). this is shown in the beginning of this timing diagram. the second period of time shows the programming of the external mode (c3 goes to high: cc-signal) for the main channel. the switch positions are immediately changed to the external af source, because the c4 level is low. the dual led is switched-off by the logic (see section external mode). the next periods of time show the way to change the switch positions for the scart channel to route b-signals to the af outputs (dual mode: bb). at first the control output port of the microcontroller for the c4 line goes into the high ohmic state. the changing of the c1, c2 or c3 level has no influence on the register data. in the timing diagram the c1 level changes from low-to-high and the c3 level goes from high-to-low. in the next steps the c4 line goes from 3-state-to-high, and the level of the other control lines are valid for the scart channel, and the b-signals are fed (dual mode: bb) to the af outputs of the main channel. after some time in this example the c1 and c2 levels change from high-to-low and the c3 level goes from low-to-high (sound mute). the scart channel is immediately muted, because the level of the c4 line is high. the last period of time shows the programming of the dual mode (aa) for the main channel. at first the control output port of the microcontroller for the c4 line goes into the high ohmic state. the changing of the c1, c2 or c3 level has no influence on the register data. the switch positions of the scart channel stay in the sound mute. in the 3-state mode the c2 level changes from low-to-high, and the c3 level goes from high-to-low. when the c4 level is low, the level of the other control lines are valid for the main channel. the a-signal (dual mode) is fed to the main outputs. the operation mode mute (see table 1) can be achieved from any position of the c4 control line without going via 3-state. figure 5 shows the hold and set-up time of the c1, c2 and c3 control line in the 3-state mode, see chapter characteristics. m icrocontroller with low/high output ports figure 11 shows an example of an application circuit for TDA9847 (v p = 4.5 to 8.8 v) in conjunction with a microcontroller, which has open drain output ports to control the main and scart channel. four resistors and two output ports of the microcontroller are necessary to generate the 3-state voltage. the other control lines have a pull-up resistor (10 k w ) in the event of open drain output stages. these resistors are not necessary for low/high output ports of the microcontroller having internal pull-up or push-pull stages. the values and tolerances of these components are given in this figure. table 4 shows the conversion logic truth table. for information about programming the different operation mode selections see section operating mode selection. power supply the different supply voltages and currents required for the analog and digital circuits are derived from an internal band-gap reference circuit. the af reference voltage is 1 2 v p . for a fast setting to 1 2 v p an internal start-up circuit is added. a good ripple rejection is achieved with the external capacitor c ref = 100 m f/16 v in conjunction with the high ohmic input of the 1 2 v p pin (pin 8). no additional dc load on this pin is allowed. power-on reset (por) when a por is activated by switching on the supply voltage or because of a supply voltage breakdown, the 117/274 hz dpll, the 117/274 hz integrator and the logic will be reset. both af channels (main and scart) are muted ( 1 ms). esd protection all pins are esd protected. the protection circuits represent the latest state of the art. internal circuit the internal pin configuration is given in fig.7.
1995 may 23 9 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 limiting values in accordance with the absolute maximum rating system (iec 134). note 1. charge device model class b: discharging a 200 pf capacitor through a 0 w series resistor. thermal characteristics characteristics v p =5v; t amb =25 c; nominal input signal v i1, 2 = 0.25 v rms value (fm: 54% modulation is equivalent to d f= 27 khz); nominal input signal v i1 = 0.5 v rms value (am: m = 0.54); nominal input signal v i3, 4 = 0.25 v rms value (am: m = 0.54); nominal output signal v o1, 2, 3, 4 = 0.5 v rms value; f af = 1 khz; v i pil = 16 mv rms value; f pil = 54.6875 khz (identi?cation frequencies: stereo = 117.48 hz, dual = 274.12 hz), 50 m s pre-emphasis; noise measurement in accordance with ccir468-3 , operating oscillator frequency f osc = 10.008 mhz; currents into the ic positive; measured in test circuit fig.8; unless otherwise speci?ed. symbol parameter conditions min. max. unit v p supply voltage (pin 22) - 0.3 +10 v v i input voltage at pins 1 to 3 and 24 - 0.3 +9.0 v v i input voltage at pins 4 to 17, 21 and 23 - 0.3 v p v v i input voltage at pins 18 and 19 - 0.3 +10 v t stg storage temperature - 25 +150 c t amb operating ambient temperature 0 +70 c v es electrostatic handling for all pins note 1 - 300 v symbol parameter value unit r th j-a thermal resistance from junction to ambient in free air sdip24 69 k/w so24 95 k/w symbol parameter conditions min. typ. max. unit supply v p supply voltage (pin 22) 4.5 5 8.8 v i p supply current (pin 22) without led current 14 15 20 ma p tot total power dissipation 63 75 176 mw v n(dc) dc voltage (pins 9 to 17 and 21) 1 2 v p - 0.1 1 2 v p 1 2 v p + 0.1 v v ref(dc) dc reference voltage (pin 8) 1 2 v p - 0.1 1 2 v p 1 2 v p + 0.1 v l l(dc) dc leakage current (pin 8) -- 1 m a
1995 may 23 10 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 af inputs (v i1 and v i2 [pins 9 and 10)] v i(rms) nominal input signal voltage (rms value) 54% modulation b/g - 0.25 - v l (only v i1 ) - 0.5 - v v i(rms) clipping voltage level (rms value) thd 1.5% v p = 5 v; b/g 0.625 0.715 - v v p = 8 v; b/g 1.050 1.200 - v v p = 5 v; l (only v i1 ) 1.200 1.400 - v v p = 8 v; l (only v i1 ) 2.100 2.350 - v g v af signal voltage gain g = v o /v i ; note 1 b/g 5 6 7 db l (only v i1 ) - 1 0 +1 db r i input resistance 40 50 60 k w r deem internal de-emphasis resistor (pins 17 and 21) see fig.4 4.25 5.0 5.75 k w additional af inputs (pins 11 and 12) v i(rms) nominal input signal voltage (rms value) 54% modulation - 0.25 - v v i(rms) clipping voltage level (rms value) thd 1.5% v p = 5 v 0.625 0.715 - v v p = 8 v 1.050 1.200 v g v af signal voltage gain g = v o /v i ; note 1 5 6 7 db r i input resistance 40 50 60 k w af outputs (pins 13 to 16) v o(rms) nominal output signal voltage (rms value) thd 0.3%; 54% modulation - 0.5 - v v o(rms) clipping voltage level (rms value) thd 1.5% v p = 5 v 1.4 1.6 - v v p = 8 v 2.4 2.65 - v r o output resistance 250 350 450 w c l load capacitor on output -- 1.5 nf r l load resistor on output (ac-coupled) 10 - -k w b frequency response (bandwidth) f i = 40 to 20000 hz; note 2 - 0.5 - +0.5 db b - 3db frequency response - 3 db; note 2 300 350 400 khz thd total harmonic distortion note 1 - 0.2 0.3 % s/n(w) weighted signal-to-noise ratio ccir468-3 (quasi-peak) 66 75 - db symbol parameter conditions min. typ. max. unit
1995 may 23 11 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 a cr crosstalk attenuation for notes 1 and 3 dual ? z s ? 1k w 70 75 - db stereo ? z s ? 1k w 40 45 - db a mute mute attenuation ? z s ? 1k w ; note 1 76 80 - db d v dc change of dc level output voltage between any two modes of operation after switching -- 10 mv psrr power supply ripple rejection f r = 70 hz; see fig.9 50 65 - db i o(dc) dc output current -- 20 m a 10 mhz crystal oscillator (pin 23) f r series resonant frequency of crystal (fundamental mode) c l = 20 pf 9.995 10.008 10.021 mhz f osc operating oscillator frequency (running in parallel resonance mode) over operating temperature range including ageing and in?uence of drive circuit 9.988 10.008 10.028 mhz r xtal equivalent crystal series resistance even at extremely low drive level ( < 1 pw) over operating temperature range with c 0 =6pf - 60 200 w r n crystal series resistance of unwanted mode 2 r r -- w c 0 crystal parallel capacitance with r r 100 w- 610pf c 1 crystal motional capacitance - 25 50 ff p xtal level of drive in operation -- 5 m w v osc(p-p) oscillator operating voltage (peak-to-peak value) 500 550 600 mv pilot processing v i pil(rms) pilot input voltage level at pin 7 (rms value) unmodulated 5 - 100 mv r i pil pilot input resistance 500 1000 - k w c i pil pilot input capacitance -- 3pf m modulation depth am 25 50 75 % symbol parameter conditions min. typ. max. unit
1995 may 23 12 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 d f pil pilot pll pull-in frequency range (referenced to f pil = 54.6875 khz) f osc = 9.988 mhz lower side - 405 -- 405 hz upper side 192 - 192 hz f osc = 10.008 mhz lower side - 296 -- 296 hz upper side 302 - 302 hz f osc = 10.028 mhz lower side - 188 -- 188 hz upper side 411 - 411 hz t pil pilot pll pull-in time 0 - 1.7 ms f lp low-pass frequency response - 3 db 450 600 750 hz r 5 low-pass output resistance 18.75 25 31.25 k w v 5(rms) identi?cation threshold voltage (rms value) -- 70 mv q l loaded quality factor of resonance circuit high sensitivity; see fig.1 40 - 50 loaded quality factor of resonance circuit with ?xed coil sensitivity loss 2 to 3 db; see fig.2 - 12 - t acqui agc agc acquisition time v i pil(rms) switched from 0 to 100 mv (rms value) -- 0.1 s identi?cation (internal functions) v i tuner identi?cation voltage sensitivity note 4 - 28 - db m v c/n pilot carrier-to-noise ratio for start of identi?cation note 5 - 33 - db/hz h hysteresis note 4 -- 2db f det pull-in frequency range of identi?cation pll (referred to f det stereo = 117.48 hz and f det dual = 274.12 hz) lower side stereo - 0.63 -- 0.63 hz dual - 0.69 -- 0.69 hz upper side stereo 0.63 - 0.63 hz dual 0.69 - 0.69 hz t det pull-in time of identi?cation pll (referenced to f det stereo = 117.48 hz and f det dual = 274.12 hz) stereo 0 - 0.8 s dual 0 - 0.8 s f ident identi?cation window frequency width (referred to f det stereo = 117.48 hz and f det dual = 274.12 hz) stereo; note 6 2.2 - 2.2 hz dual; note 6 2.3 - 2.3 hz t integr integrator time constant 0.94 - 0.94 s symbol parameter conditions min. typ. max. unit
1995 may 23 13 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 notes to the characteristics 1. v o = 0.5 v (rms value); f = 1 khz. 2. without de-emphasis capacitors with respect to nominal gain. 3. in dual mode: a (b)-signal into b (a) channel; in stereo mode: r-signal into left channel; l-signal = 0. 4. tuner input signal, measured with pcalh reference front end ( 1 2 emf, 75 w , 2t/20t/white bar, 100% video) and pc/sc 1 = 13 db; pc/sc 2 = 20 db. the pilot band-pass has to be aligned. 5. bandwidth of the pilot bp-filter b - 3db = 1.2 khz. v i2 input driven with identification-modulated pilot carrier and white noise. 6. identification window is defined as twice the pull-in frequency range (lower plus upper side) of identification pll (steady detection) plus window increase due to integrator (fluctuating detection). 7. the maximal total system identification time on is equal to t ident(on) plus t acqui agc . 8. the maximal total system identification time off is equal to t ident(off) . t ident(on) total identi?cation time on stereo; note 7 0.35 - 2.0 s dual; note 7 0.35 - 2.0 s t ident(off) total identi?cation time off stereo; note 8 0.60 - 1.5 s dual; note 8 0.60 - 1.5 s led (pins 18 and 19) v l(off) output voltage led off -- 8.8 v v l(on) output voltage led on -- 0.7 v i l(off) input current led off -- 1 m a i l(on) input current led on -- 12 ma control input ports c1 to c3 (pins 1, 2 and 24) v il low level input voltage 0 - 0.8 v v ih high level input voltage 2.0 5.0 8.8 v i il low level input current -- -1 m a i ih high level input current -- 1 m a control input port c4 (pin 3) v il low level input voltage 0 - 0.8 v v ct 3-state level input voltage 1.5 1.8 2.1 v v ih high level input voltage 2.8 5.0 8.8 v i il low level input current --- 1 m a i ct 3-state level input current --- 1 m a i ih high level input current -- 1 m a t h1 high level hold time see fig.5 5 -- m s t h2 low level hold time see fig.5 5 -- m s t su1 high level set-up time see fig.5 0.25 -- m s t su2 low level set-up time see fig.5 0.25 -- m s symbol parameter conditions min. typ. max. unit
1995 may 23 14 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 table 1 control input port matrix to select af inputs and af outputs (main channel) notes 1. the combination 1000 is not allowed. 2. in mute mode the content of the 117 hz/274 hz integrator will be reset. the leds are switched-off. 3. the previous state is unchanged. 4. the led shows the identification status. mode input signal output signal control input port (1) led st/ds/m scart main scart v i1 9 v i2 10 v i3 11 v i4 12 v o1 14 v o2 13 v o3 16 v o4 15 c4 3 c3 24 c2 2 c1 1 dual 18 stereo 19 mute (2) ----- no signal no signal 0 0 0 0 off off sound mute ----- no signal note 3 0 1 0 0 note 4 note 4 mono m m --- m m note 3 0 0 0 1 off off m --- m m 0010off off am --- am am 0 0 1 1 off off stereo st s r -- lrlr0001off on sr -- s s s s 0010off on sr -- s s s s 0011off on dual ds a b -- a b note 3 0 0 0 1 on off ab -- a a 0010on off ab -- b b 0011on off external --- c d c d note 3 0 1 0 1 off off -- cdcc 0110off off -- cddd 0111off off
1995 may 23 15 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 table 2 control input port matrix to select af inputs and af outputs (scart channel) notes 1. the combination 1000 is not allowed. 2. the previous state is unchanged. mode input signal output signal control input port (1) st/ds/m scart main scart v i1 9 v i2 10 v i3 11 v i4 12 v o1 14 v o2 13 v o3 16 v o4 15 c4 3 c3 24 c2 2 c1 1 sound mute - ---- note 2 no signal 1 1 0 0 mono m m --- note 2 m m 1 0 0 1 m --- m m 1010 am --- am am 1 0 1 1 stereo st s r -- note 2 -- 1001 sr -- -- 1010 sr -- -- 1011 dual ds a b -- note 2 a b 1 0 0 1 ab -- a a 1010 ab -- b b 1011 external --- c d note 2 c d 1 1 0 1 -- cd cc1110 -- cd dd1111 table 3 explanation of tables 1 and 2 signal description r right l left s a and b dual sound a/b c and d external sound source (scart) am am sound (standard l) m mono sound ds dual sound st stereo sound lr + () 2 -------------------- table 4 conversion logic truth table for the c4 control line (see fig.11) microprocessor output control ports TDA9847 c41 c42 c4 c4-level 001 3 3.2 v 1 0 3-state 1.8 0.25 v 110 0.45 v 0 1 not allowed unde?ned
1995 may 23 16 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 fig.4 tolerance scheme of af frequency response; de-emphasis with c d1 , c d2 = 10 nf ( 5%); r internal =5k w ( 15%). - 2 + 1 + 2 - 1 10 5 med647 10 4 10 3 10 2 10 0 v oaf (db) f oaf (hz) r: - 15%; c: - 5% r: + 15%; c: + 5% fig.5 waveforms showing the hold and set-up times of the c1 to c3 control line in the 3-state mode. low high 0 5 v (v) c4 0.8 t (s) 1.5 2.1 2.8 3-state med811 low high 0 5 v (v) c1/c2/c3 0.8 t (s) 2 t su1 t h1 t su2 t h2 t su1 t h1 t su2 t h2
1995 may 23 17 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 fig.6 programming the main and scart register of the TDA9847 with a microcontroller via the control lines c1 to c4; the dual identification frequency is detected. low high 0 5 2 v (v) c1 0.8 t (s) low high 0 5 2 v (v) c2 0.8 t (s) low high 0 5 2 v (v) c3 0.8 t (s) low high 0 5 v (v) c4 0.8 t (s) 1.5 2.1 2.8 storage scart valid main dual: aa 3-state valid scart storage main valid main dual: aa dual: aa external: cc dual: bb sound mute med810 af outputs main scart
1995 may 23 18 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 internal circuitry fig.7 internal circuits. 2 k w 25 k w 1 2 4 60 a 40 a 5 k w 5 k w 40 a 60 a 5 6 7 i 8 9 i b 10 i b 11 i b b 5 k w 2 k w + 5 k w 3 pf 13 k w 24 23 22 + + 5 k w 21 20 + + 5 k w 19 200 a 200 a 18 17 16 15 TDA9847 af outputs af inputs v p gnd c1 c agc c lp c dcl c ref v i1 v i2 v i3 v i pil leddu v o3 v o4 c d1 c d2 c3 xtal 25 k w 22.5 k w 25 k w 35 k w 50 k w 50 k w +5 v c2 ledst esd protection diode for pins 4 to 17, 21 and 23 zener diode protection for pins 1, 2, 3, 18, 19, 20 and 24 v p 3 a 2 k w v p 3 a v p v p v p 3 a v p v p v p v p v p v p v p v p 12 i b v i4 50 k w 2 k w 3 c4 v p 3 a i b 15 k w 200 a 200 a 14 13 v o1 v o2 v p v p v p 3 a med807 5 k w z\x v p z\x v p z\x v p z\x v p z\x v p
1995 may 23 19 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 test and application information fig.8 test circuit of the stereo decoder TDA9847. 1 2 3 c1 c2 c4 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 TDA9847 2.5 mh 3.3 nf control input ports c3 control input port 10 mhz x tal v p c vp c d2 c d1 c agc c lp c dcl 10 nf 10 nf 100 nf 10 nf 10 m f 10 m f 100 m f/16v 4 x 2.2 m f 5% 5% stereo transmission 1 k w 30 k w 2.2 k w 2.2 k w v p dual transmission 50 m s de-emphasis 50 m s de-emphasis v o3 v i1 v i2 v i3 v i4 v o4 v o1 v o2 scart main 47 pf af from 5.5 mhz or from am demodulator (l) af from 5.742 mhz external sound source c external sound source d scart 1/2 v p c ref med806
1995 may 23 20 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 fig.9 test circuit for measurement of ripple rejection. 5 v modulated with 200 mv (p-p) 10 k w 100 m f 100 m f/16v 100 m f 70 hz v p hp3585 TDA9847 20 22 8 9 10 11 12 16 15 14 13 med808 fig.10 application circuit for the stereo decoder TDA9847 in conjunction with a microcontroller [low/high output ports with internal pull-ups or push-pull stages (c1 to c3) and low/high-ohmic/high output port (c4)]. all resistors: 2%. microcontroller stereo decoder r c4b 6.2 k w r c4a 11 k w TDA9847 1 3 2 24 20 22 v p = 5 v 10% c4 c3 c2 c1 v p = 4.5 to 8.8 v med809
1995 may 23 21 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 fig.11 application circuit for the stereo decoder TDA9847 in conjunction with a microcontroller (low/high with open-drain output ports). resistors rc4a and rc4b 2%; all other resistors 10%; transistors bc types or equivalent. microcontroller stereo decoder r c1 10 k w r c2 10 k w r c42a 10 k w r c4a 11 k w r c41a 10 k w r c41b r c42b r c3 10 k w r c4b 6.2 k w 100 k w 100 k w c41 c42 TDA9847 3 1 2 24 20 22 v p = 5 v 10% v p = 4.5 to 8.8 v c1 c2 c3 c4 med812
1995 may 23 22 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 package outlines unit b 1 cee m h l references outline version european projection issue date iec jedec eiaj mm dimensions (mm are the original dimensions) sot234-1 92-11-17 95-02-04 b max. w m e e 1 1.3 0.8 0.53 0.40 0.32 0.23 22.3 21.4 9.1 8.7 3.2 2.8 0.18 1.778 10.16 10.7 10.2 12.2 10.5 1.6 4.7 0.51 3.8 m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 24 1 13 12 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. (1) (1) d (1) z a max. 12 a min. a max. sdip24: plastic shrink dual in-line package; 24 leads (400 mil) sot234-1
1995 may 23 23 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot137-1 x 12 24 w m q a a 1 a 2 b p d h e l p q detail x e z c l v m a 13 (a ) 3 a y 0.25 075e05 ms-013ad pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.61 0.60 0.30 0.29 0.050 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 e 1 0 5 10 mm scale so24: plastic small outline package; 24 leads; body width 7.5 mm sot137-1 95-01-24 97-05-22
1995 may 23 24 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 soldering plastic dual in-line packages b y dip or wave the maximum permissible temperature of the solder is 260 c; this temperature must not be in contact with the joint for more than 5 s. the total contact time of successive solder waves must not exceed 5 s. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. r epairing soldered joints apply a low voltage soldering iron below the seating plane (or not more than 2 mm above it). if its temperature is below 300 c, it must not be in contact for more than 10 s; if between 300 and 400 c, for not more than 5 s. plastic small outline packages b ywave during placement and before soldering, the component must be fixed with a droplet of adhesive. after curing the adhesive, the component can be soldered. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 c within 6 s. typical dwell time is 4 s at 250 c. a modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications. b y solder paste reflow reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement. several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. dwell times vary between 50 and 300 s according to method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 min at 45 c. r epairing soldered joints ( by hand - held soldering iron or pulse - heated solder tool ) fix the component by first soldering two, diagonally opposite, end pins. apply the heating tool to the flat part of the pin only. contact time must be limited to 10 s at up to 300 c. when using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 c. (pulse-heated soldering is not recommended for so packages.) for pulse-heated solder tool (resistance) soldering of vso packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement.
1995 may 23 25 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
1995 may 23 26 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 notes
1995 may 23 27 philips semiconductors preliminary speci?cation tv and vtr stereo/dual sound processor with digital identi?cation TDA9847 notes
philips semiconductors C a worldwide company argentina: ierod, av. juramento 1992 - 14.b, (1428) buenos aires, tel. (541)786 7633, fax. (541)786 9367 australia: 34 waterloo road, north ryde, nsw 2113, tel. (02)805 4455, fax. (02)805 4466 austria: triester str. 64, a-1101 wien, p.o. box 213, tel. (01)60 101-1236, fax. (01)60 101-1211 belgium: postbus 90050, 5600 pb eindhoven, the netherlands, tel. (31)40 783 749, fax. (31)40 788 399 brazil: rua do rocio 220 - 5 th floor, suite 51, cep: 04552-903-s?o paulo-sp, brazil. p.o. box 7383 (01064-970), tel. (011)821-2333, fax. (011)829-1849 canada: philips semiconductors/components: tel. (800) 234-7381, fax. (708) 296-8556 chile: av. santa maria 0760, santiago, tel. (02)773 816, fax. (02)777 6730 colombia: iprelenso ltda, carrera 21 no. 56-17, 77621 bogota, tel. (571)249 7624/(571)217 4609, fax. (571)217 4549 denmark: prags boulevard 80, pb 1919, dk-2300 copenhagen s, tel. (032)88 2636, fax. (031)57 1949 finland: sinikalliontie 3, fin-02630 espoo, tel. (358)0-615 800, fax. (358)0-61580 920 france: 4 rue du port-aux-vins, bp317, 92156 suresnes cedex, tel. (01)4099 6161, fax. (01)4099 6427 germany: p.o. box 10 63 23, 20043 hamburg, tel. (040)3296-0, fax. (040)3296 213. greece: no. 15, 25th march street, gr 17778 tavros, tel. (01)4894 339/4894 911, fax. (01)4814 240 hong kong: philips hong kong ltd., 15/f philips ind. bldg., 24-28 kung yip st., kwai chung, n.t., tel. (852)424 5121, fax. (852)480 6960/480 6009 india: philips india ltd, shivsagar estate, a block , dr. annie besant rd. worli, bombay 400 018 tel. (022)4938 541, fax. (022)4938 722 indonesia: philips house, jalan h.r. rasuna said kav. 3-4, p.o. box 4252, jakarta 12950, tel. (021)5201 122, fax. (021)5205 189 ireland: newstead, clonskeagh, dublin 14, tel. (01)7640 000, fax. (01)7640 200 italy: philips semiconductors s.r.l., piazza iv novembre 3, 20124 milano, tel. (0039)2 6752 2531, fax. (0039)2 6752 2557 japan: philips bldg 13-37, kohnan 2 -chome, minato-ku, tokyo 108, tel. (03)3740 5130, fax. (03)3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. (02)709-1412, fax. (02)709-1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. (03)750 5214, fax. (03)757 4880 mexico: 5900 gateway east, suite 200, el paso, tx 79905, tel. 9-5(800)234-7381, fax. (708)296-8556 netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb tel. (040)783749, fax. (040)788399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. (09)849-4160, fax. (09)849-7811 norway: box 1, manglerud 0612, oslo, tel. (022)74 8000, fax. (022)74 8341 pakistan: philips electrical industries of pakistan ltd., exchange bldg. st-2/a, block 9, kda scheme 5, clifton, karachi 75600, tel. (021)587 4641-49, fax. (021)577035/5874546 philippines: philips semiconductors philippines inc, 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. (02)810 0161, fax. (02)817 3474 portugal: philips portuguesa, s.a., rua dr. antnio loureiro borges 5, arquiparque - miraflores, apartado 300, 2795 linda-a-velha, tel. (01)4163160/4163333, fax. (01)4163174/4163366 singapore: lorong 1, toa payoh, singapore 1231, tel. (65)350 2000, fax. (65)251 6500 south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430, johannesburg 2000, tel. (011)470-5911, fax. (011)470-5494. spain: balmes 22, 08007 barcelona, tel. (03)301 6312, fax. (03)301 42 43 sweden: kottbygatan 7, akalla. s-164 85 stockholm, tel. (0)8-632 2000, fax. (0)8-632 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. (01)488 2211, fax. (01)481 77 30 taiwan: philips taiwan ltd., 23-30f, 66, chung hsiao west road, sec. 1. taipeh, taiwan roc, p.o. box 22978, taipei 100, tel. (02)388 7666, fax. (02)382 4382 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, thailand, tel. (662)398-0141, fax. (662)398-3319 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. (0 212)279 27 70, fax. (0212)282 67 07 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. (0181)730-5000, fax. (0181)754-8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. (800)234-7381, fax. (708)296-8556 uruguay: coronel mora 433, montevideo, tel. (02)70-4044, fax. (02)92 0601 internet: http://www.semiconductors.philips.com/ps/ for all other countries apply to: philips semiconductors, international marketing and sales, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, telex 35000 phtcnl, fax. +31-40-724825 scd40 ? philips electronics n.v. 1995 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. printed in the netherlands 533061/1500/02/pp28 date of release: 1995 may 23 document order number: 9397 750 00154

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